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Motherboard Layout and Routing Guidelines
2.3.1
GTL+ Description
GTL+ is the electrical bus technology used for the Intel
®
Pentium
drain bus with external pull-up resistors that provide both the high logic level and termination at the
end of the bus. The complete GTL+ specification is contained in the Pentium II processor
databook. The specification defines:
•
Termination voltage, V
•
Termination resistance, R
•
Maximum output low voltage, V
•
Output driver edge rate when driving the GTL+ reference load
•
Receiver high and low voltage level, V
•
Receiver reference voltage, V
•
Receiver ringback tolerance
Refer to the 100 MHz GTL+ layout Guidelines for the Pentium
AGPset for more details.
2.3.2
GTL+ Layout Recommendations
This section contains the layout recommendations for the GTL+ signals. The layout
recommendations are derived from pre-layout simulations that Intel has run using the methodology
described in
simulations are included in this section.
See the Intel
be present on the particular stepping of the processor used.
2.3.3
Single Processor Design
2.3.3.1
Single Processor Network Topology and Conditions
The recommended topology for single processor systems is shown in
termination resistor on the Pentium II processor substrate, a termination resistor is placed on the
system board. The recommended value for the termination resistor is 56
Figure 2-7. Recommended Topology for Single Processor Design
2-6
II processor system bus. GTL+ is a low output swing, incident wave switching, open-
TT
TT
REF
Section 2.3.7, "Design Methodology" on page
®
®
Pentium
II Processor Specification Update for workarounds for any errata that may
®
Pentium
, and output low current, I
OL
and V
IL
IH
, as a function of the termination voltage
2-11. Results from the pre-layout
V
TT
R
TT
L4
L2
L1
®
Pro processor and Intel
OL
®
®
II Processor and Intel
Figure
2-7. In addition to the
± 5%.
L3
®
Intel
440GX
AGPset
®
Intel
440GX AGPset Design Guide
®
440GX
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