Bootblock Initialization Code Checkpoints; Table 76: Bootblock Initialization Code Checkpoints - Intel SE7520JR2 Technical Manual

Error Reporting and Handling
Diagnostic LED Decoder
Checkpoint
G=Green, R=Red, A=Amber
MSB
8C A
8D A
8E A
90 R OFF
A0 R OFF
A1 R OFF
A2 R OFF
A4 R
A7 R
A8 A OFF
A9 A OFF
AA A OFF
AB A OFF
AC A
B1 R OFF
00 OFF OFF
6.5.4

Bootblock Initialization Code Checkpoints

The Bootblock initialization code sets up the chipset, memory and other components before
system memory is available. The following table describes the type of checkpoints that may
occur during the bootblock initialization portion of the BIOS:
Diagnostic LED Decoder
Checkpoint
G=Green, R=Red, A=Amber
MSB
Before D1
D1 R
D0 R
D2 R
D3 R
170
LSB
G OFF OFF Late POST initialization of chipset registers.
G OFF G Build ACPI tables (if ACPI is supported)
G G OFF Program the peripheral parameters. Enable/Disable NMI as selected
OFF R Late POST initialization of system management interrupt.
R OFF Check boot password if installed.
R G Clean-up work needed before booting to operating system.
Takes care of runtime image preparation for different BIOS modules.
Fill the free area in F000h segment with 0FFh. Initializes the Microsoft
A OFF
IRQ Routing Table. Prepares the runtime language module. Disables
the system configuration display if needed.
G R OFF Initialize runtime language module.
Displays the system configuration screen if enabled. Initialize the
G A G
CPU's before boot, which includes the programming of the MTRR's.
R OFF Prepare CPU for operating system boot including final MTRR values.
R G Wait for user input at config display if needed.
Uninstall POST INT1Ch vector and INT09h vector. Deinitializes the
A OFF
ADM module.
A G Prepare BBS for Int 19 boot.
G R OFF End of POST initialization of chipset registers.
R A Save system context for ACPI.
OFF OFF Passes control to OS Loader (typically INT19h).

Table 76: Bootblock Initialization Code Checkpoints

LSB
Early chipset initialization is done. Early super I/O initialization is done
including RTC and keyboard controller. NMI is disabled.
Perform keyboard controller BAT test. Check if waking up from power
R OFF A management suspend state. Save power-on CPUID value in scratch
CMOS.
Go to flat mode with 4GB limit and GA20 enabled. Verify the
R OFF R
bootblock checksum.
Disable CACHE before memory detection. Execute full memory sizing
R G R
module. Verify that flat mode is enabled.
If memory sizing module not executed, start memory refresh and do
R G A memory sizing in Bootblock code. Do additional chipset initialization.
Re-enable CACHE. Verify that flat mode is enabled.
Description
Description
C78844-002
Intel® Server Board SE7520JR2
Revision 1.0