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User Manual 3155
The Status Byte
Register (STB)
The Status Byte summary register contains conditions from the other
registers. Query data waiting in the generator's output buffer is i m -
mediately reported through the Message Available bit (bit 4). Bits in
the summary register are not latched. Clearing an event register will
clear the corresponding bits in the Status Byte summary register.
Description of the various bits within the Status Byte summary regis-
ter is given in the following:
Bit 0 - Decimal value 1. Not used, always set to 0.
Bit 1 - Decimal value 2. Not used, always set to 0.
Bit 2 - Decimal value 4. Not used, always set to 0.
Bit 3 - Decimal value 8. Not used, always set to 0.
Bit 4 - Decimal value 16. Message Available Queue Summary
Message (MAV). The state of this bit indicates whether or not the
output queue is empty. The MAV summary message is true when
the output queue is not empty. This message is used to synchro-
nize information exchange with the controller. The controller can,
for example, send a query command to the device and then wait
for MAV to become true. If an application program begins a read
operation of the output queue without first checking for MAV, all
system bus activity is held up until the device responds.
Bit 5 - Decimal value 32. Standard Event Status Bit (ESB) Sum-
mary Message. This bit indicates whether or not one or more of
the enabled ESB events have occurred since the last reading or
clearing of the Standard Event Status Register.
Bit
6
-
Decimal
(MSS)/Request Service (RQS) Bit. This bit indicates if the device
has at least one condition to request service. The MSS bit is not
part of the IEEE-STD-488.1 status byte and will not be sent in re-
sponse to a serial poll. However, the RQS bit, if set, is sent in re-
sponse
Bit 7 - Decimal value 128. Not used, always set to 0.
value
64.
Master
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Programming Reference 4-67
Summary
Status
serial
poll.
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