The Scpi Status Registers - Racal Instruments 3155 User Manual

100ms/s arbitrary waveform generator
Table of Contents

Advertisement

The SCPI Status
Registers
Programming Reference 4-66
*RST - Resets the generator to its default state. Default values are listed
in Table 4-1.
*SRE <enable_value> - Enables bits in the Status Byte enable register.
*SRE? - Query the Status Byte enable register. The generator returns a
decimal value in the range of 0 to 63 or 128 to 191 since bit 6 (RSQ)
cannot be set. The binary-weighted sum of the number represents the
value of the bits of the Service Request enable register.
*STB? - Query the Status Byte summary register. The *STB? command
is similar to a serial poll but is processed like any other instrument
command. The *STB? command returns the same result as a serial poll,
but the "request service" bit (bit 6) is not cleared if a serial poll has oc-
curred.
*TRG - Triggers the generator from the remote interface. This command
effects the generator if it is first placed in the Trigger or Burst mode of
operation and the trigger source is set to "BUS".
*TST? - Implements an internal self-test and returns a value indicating
the error type. Approximately 90% of the 3155 functionality is tested.
*WAI – Wait for all pending operations to complete before executing any
additional commands over the interface.
The Model 3155 uses the Status Byte register group and the Stan-
dard Event register group to record various instrument conditions.
Figure 4-1 shows the SCPI status system.
An Event Register is a read-only register that reports defined condi-
tions within the generator. Bits in an event register are latched. When
an event bit is set, subsequent state changes are ignored. Bits in an
event register are automatically cleared by a query of that register or
by sending the *CLS command. The *RST command or device clear
does not clear bits in an event register. Querying an event register
returns a decimal value, which corresponds to the binary-weighted
sum of all bits, set in the register.
An Event Register defines which bits in the corresponding event
register are logically ORed together to form a single summary bit.
The user can read from and write to an Enable Register. Querying an
Enable Register will not clear it. The *CLS command does not clear
Enable Registers but it does clear bits in the event registers. To en-
able bits in an enable register, write a decimal value that corresponds
to the binary-weighted sum of the bits required to enable in the reg-
ister.
User Manual 3155

Advertisement

Table of Contents
loading

Table of Contents