Dmi2 / Pci Express* Port 0 Signals; Platform Environment Control Interface (Peci) Signal; System Reference Clock Signals; Pci Express* Miscellaneous Signals - Intel BX80619I73960X Datasheet

Table 6-6.

PCI Express* Miscellaneous Signals

Signal Name
PE_RBIAS
PE_RBIAS_SENSE
PE_VREF_CAP
6.3

DMI2 / PCI Express* Port 0 Signals

Table 6-7.

DMI2 to Port 0 Signals

Signal Name
DMI_RX_DN[3:0]
DMI_RX_DP[3:0]
DMI_TX_DP[3:0]
DMI_TX_DN[3:0]
6.4 Platform Environment Control Interface (PECI)
Signal
Table 6-8.

PECI Signals

Signal Name
6.5

System Reference Clock Signals

Table 6-9.

System Reference Clock (BCLK{0/1}) Signals

Signal Name
BCLK{0/1}_D[N/P]
44
This input is used to control PCI Express* bias currents. A 50 ohm 1%
tolerance resistor must be connected from this land to V
PE_RBIAS is required to be connected as if the link is being used even when
PCIe* is not used.
Provides dedicated bias resistor sensing to minimize the voltage drop caused
by packaging and platform effects. PE_RBIAS_SENSE is required to be
connected as if the link is being used even when PCIe* is not used.
PCI Express* voltage reference used to measure the actual output voltage
and comparing it to the assumed voltage. A 0.01 uF capacitor must be
connected from this land to V
DMI2 Receive Data Input
DMI2 Transmit Data Output
PECI (Platform Environment Control Interface) is the serial sideband interface
PECI
to the processor and is used primarily for thermal, power and error
management.
Reference Clock Differential input. These pins provide the PLL reference clock
differential input into the processor.
Signal Descriptions
Description
SS
.
SS
Description
Description
Description
Datasheet, Volume 1
by the platform.