Jtag And Tap Signals Dc Specifications; Serial Vid Interface (Svid) Dc Specifications - Intel BX80619I73960X Datasheet

Electrical Specifications
Table 7-16. JTAG and TAP Signals DC Specifications
Symbol
V
IL
V
IH
V
OL
V
OH
R
ON
I
IL
I
IL
I
O
Notes:
1. These are measured between V
Table 7-17. Serial VID Interface (SVID) DC Specifications
Symbol
V
TT
V
IL
V
IH
V
OH
R
ON
I
IL
I
IL
Notes:
1. V refers to instantaneous V
TT
2. Measured at 0.31*V
3. Vin between 0 V and V
Datasheet, Volume 1
Parameter
Input Low Voltage
Input High Voltage
Output Low Voltage
(R = 500 ohm)
TEST
Output High Voltage
(R = 500 ohm)
TEST
Buffer On Resistance Signals BPM[7:0], TDO,
EAR_N
Input Leakage Current, Signals PREQ_N, TCK,
TDI, TMS, TRST_N
Input Leakage Current, Signals BPM_N[7:0], TDO,
EAR_N
(R = 50 ohm)
TEST
Output Current, Signal PRDY_N
(R = 500 ohm)
TEST
Input Edge Rate
Signals: BPM_N[7:0], EAR_N, PREQ_N, TCK, TDI,
TMS, TRST_N
and V
IL
Parameter
CPU I/O Voltage
Input Low Voltage SVIDDATA,
SVIDALERT_N
Input High Voltage SVIDDATA,
SVIDALERT_N
Output High Voltage SVIDCLK,
SVIDDATA
Buffer On Resistance SVIDCLK,
SVIDDATA
Input Leakage Current, Signals
SVIDCLK, SVIDDATA
Input Leakage Current, Signal
SVIDALERT_N
.
TT
TT
TT
Min
—
0.7*VTT
—
0.88*V
—
-50
—
-1.50
0.05
.
IH
Min Typ
VTT - 3% 1.05
— —
0.7*V —
TT
— —
—
— —
-500 —
Max Units
0.3*VTT V
— V
0.12*V V
TT
— V
TT
14 Ω
+50
μA
+900
μA
+1.50 mA
— V/ns
Max Units Notes
VTT + 3% V
0.3*V V
TT
— V
V V
TT(max)
14 Ω
+900 μA
+500 μA
Notes
1
1
1
1
2
3
3
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