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Table C-2. HP E1340A Command Opcodes and Parameter Formats (Cont'd)
Setting the Clock Source and Output Mode
Bit
7
128
Bit
Weight
Aux Out
Purpose
Level
0 - Normal
Setting
1 - Inverted
Bit
7
Bit
128
Weight
RAM Bank
Purpose
0 0 - RAM 0
Setting
0 1 - RAM 1
1 0 - RAM 2
1 1 - RAM 3
Reading AFG Settings
Bits
Byte 1 ------->
Bits
242 HP E1340A Register-Based Programming
6
5
64
32
Aux In Level
0 - Normal
0 0 0 - External
0 0 1 - Gated
0 1 0 - Burst
1 - Inverted
0 1 1 - Internal
1 0 0 - Input Data Register
1 0 1 - reserved
1 1 0 - No clock
1 1 1 - No clock
6
5
64
32
Frequency
Register
0 - Register 1
1 - Register 2
7
6
5
Soft Reset
7
6
5
Byte 1
4
3
16
8
Clock Source
(base + 0C
)
16
Byte 2
4
3
16
8
Output Mode
0 0 0 - Continuous (fixed)
0 0 1 - FSK
0 1 0 - Wave hop
0 1 1 - Internal burst
1 0 0 - External burst
1 0 1 - Sweep
1 1 0 - Direct DAC access
1 1 1 - Fast frequency change
Command Opcode = 13
4
3
Query Byte
Command Opcode = 14
4
3
no parameter
Command Opcode = 9
2
1
4
2
Aux Out
(Marker)
0 0 - 42 MHz osc
0 - Wave hop
0 1 - Pulse/cycle
- FSK
1 0 - Zero cross
- Triggered Burst
1 1 - Sweep sync
1 - External Clock
- Gate
(internal clock)
2
1
4
2
RAM Size
0 0 - 4k
0 1 - 8k
1 0 - 16k
2
1
0
2
1
0
Appendix C
0
1
Aux In
0
1
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