Using The Standard Event Status Register To Trap An Incorrect Hp-Ib Command- Example; Event Status Register; Using The Questionable Data/Signal Status Register To Alert The Computer When Automatic Interpolator Calibration Is Disabled- Example - HP 53131A/132A 225 MHz Programming Manual

Chapter 3 Programming Your Universal Counter for Remote Operation
Elements of SCPI Commands
Using the Standard Event Status Register to Trap an Incorrect
HP-IB command— Example 2
The following command grouping shows how to use the Standard Event Status
Register and the Status Byte Register to alert the computer when an incorrect
command is sent to the Counter.
The command *ESE 32 tells the Counter to summarize the command error bit ( bit
5 of the Event Status Register) in the Status Byte Register. The command error bit
is set when an incorrect command is received by the Counter. The command *SRE
32 tells the Counter to assert the SRQ line when the Event Status Register
summary bit is set to 1. If the Counter is serial polled after a command error, the
serial poll result will be 96.

Event Status Register

*ESE 32
Enable for bad command.
*SRE 32
Assert SRQ from Standard Event Status Register summary.
Using the Questionable Data/Signal Status Register to Alert the
Computer When Automatic Interpolator Calibration is
Disabled— Example 3
The default operation of the Counter is for automatic interpolator calibration to
occur before every measurement. To optimize throughput over the HP-IB, the
automatic calibration can be disabled. When it is disabled, the most recent
calibration values are used. These values may not be the optimal values for a
particular temperature or other environmental condition. For this reason,
the Time, Frequency and Phase bits in the Questionable Data register are set
whenever the automatic calibration is disabled.
In the following Questionable Data Status Register example, the first line tells the
Counter to detect a transition from negative
(non-questionable data) to positive (questionable data) of bits 2, 5, and 6 in the
Questionable Data Register. The next line tells the Counter to summarize the
detected events in the Status Byte Register. The command *SRE 8 tells the
Counter to assert the SRQ line when the summary bit for the Questionable Data
register is set to 1. A serial poll will return the value 72 when the automatic
calibration transitions from on to off.
Programming Guide 3-39