Memory Compare And Exchange Size; Compare And Exchange Semaphore Types - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual

cmpxchg
cmpxchg — Compare and Exchange
( ) cmpxchg
Format: qp
( ) cmp8xchg16.
qp
A value consisting of sz bytes (8 bytes for cmp8xchg16) is read from memory starting at
Description:
the address specified by the value in GR
with the contents of the cmpxchg Compare Value application register (AR[CCV]). If the
two are equal, then the least significant sz bytes of the value in GR r
memory starting at the address specified by the value in GR r
two are equal, then 8-bytes from GR r
3 (GR & ~0x8), and 8 bytes from the Compare and Store Data application register
r
3
(AR[CSD]) are stored at that address + 8 ((GR
value read from memory is placed in GR r
cleared.
The values of the sz completer are given in
type of semaphore operation. These operations are described in
Section 4.4.7, "Sequentiality Attribute and Ordering" on page 2:82
memory ordering.
Table 2-19.
Table 2-20.
sem
Completer
acq
rel
If the address specified by the value in GR
value being accessed in memory, an Unaligned Data Reference fault is taken
independent of the state of the User Mask alignment checking bit, UM.ac (PSR.ac in the
Processor Status Register). For the cmp8xchg16 instruction, the address specified must
be 8-byte aligned.
The memory read and write are guaranteed to be atomic. For the cmp8xchg16
instruction, the 8-byte memory read and the 16-byte memory write are guaranteed to
be atomic.
Both read and write access privileges for the referenced page are required. The write
access privilege check is performed whether or not the memory write is performed.
This instruction is only supported to cacheable pages with write-back write policy.
Accesses to NaTPages cause a Data NaT Page Consumption fault. Accesses to pages
with other memory attributes cause an Unsupported Data Reference fault.
The value of the ldhint completer specifies the locality of the memory access. The values
of the ldhint completer are given in
3:46
. . = [ ], , ar.ccv
sz sem ldhint r r r
1 3 2
. = [ ], , ar.csd, ar.ccv
sem ldhint r r r
1 3 2

Memory Compare and Exchange Size

sz Completer
1
2
4
8

Compare and Exchange Semaphore Types

Ordering
Semantics
Acquire The memory read/write is made visible prior to all subsequent data memory
accesses.
Release The memory read/write is made visible after all previous data memory
accesses.
Table 2-34 on page
. The value is zero extended and compared
r
3
3
are stored at the specified address ignoring bit
2
& ~0x8) + 8). The zero-extended
r
3
and the NaT bit corresponding to GR r
1
Table 2-19. The sem completer specifies the
Bytes Accessed
Semaphore Operation
is not naturally aligned to the size of the
r
3
3:152. Locality hints do not
M16
sixteen_byte_form M16
are written to
2
. For cmp8xchg16, if the
is
1
Table 2-20. See
for details on
1
2
4
8
Volume 3: Instruction Reference