Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual page 296

Table 3-1. Pseudo-code Functions (Continued)
Function
rse_load(type)
rse_new_frame(current_frame_size,
new_frame_size)
rse_preserve_frame(preserved_frame_si
ze)
rse_restore_frame(preserved_sol,
growth, current_frame_size)
rse_store(type)
rse_update_internal_stack_pointers(new
_store_pointer)
sign_ext(value, pos)
Volume 3: Pseudo-Code Functions
Restores a register or NaT collection from the backing store (load_address =
RSE.BspLoad - 8). If load_address{8:3} is equal to 0x3f then a NaT collection is
loaded into a NaT dispersal register. (dispersal register may not be the same
as AR[RNAT].) If load_address{8:3} is not equal to 0x3f then the register
RSE.LoadReg - 1 is loaded and the NaT bit for that register is set to
dispersal_register{load_address{8:3}}. If the load is successful
RSE.BspLoad is decremented by 8. If the load is successful and a register was
loaded RSE.LoadReg is decremented by 1 (possibly wrapping in the stacked
registers). The load moves a register from the invalid partition to the current frame if
RSE.CFLE is 1, or to the clean partition if RSE.CFLE is 0. For mandatory RSE loads,
type is MANDATORY. Mandatory RSE loads may cause interruptions. See
Table 6-6, "RSE Interruption Summary" on page
A new frame is defined without changing any register renaming. The new frame size
is completely defined by the new_frame_size parameter (successive calls are not
cumulative). If new_frame_size is larger than current_frame_size and the
number of registers in the invalid and clean partitions is less than the size of frame
growth then mandatory RSE stores are issued until enough registers are available.
The resulting sequence of RSE stores may be interrupted. Mandatory RSE stores
may cause interruptions; see
The number of registers specified by preserved_frame_size are marked to be
preserved by the RSE. Register renaming causes the preserved_frame_size
registers after GR[32] to be renamed to GR[32]. AR[BSP] is updated to contain the
backing store address where the new GR[32] will be stored.
The first two parameters define how the current frame is about to be updated by a
branch return or rfi: preserved_sol defines how many registers need to be
restored below RSE.BOF; growth defines by how many registers the top of the
current frame will grow (growth will generally be negative). The number of registers
specified by preserved_sol are marked to be restored. Register renaming causes
the preserved_sol registers before GR[32] to be renamed to GR[32]. AR[BSP] is
updated to contain the backing store address where the new GR[32] will be stored. If
the number of dirty and clean registers is less than preserved_sol then mandatory
RSE loads must be issued before the new current frame is considered valid. This
function does not perform mandatory RSE loads. This function returns TRUE if the
preserved frame grows beyond the invalid and clean regions into the dirty region. In
this case the third argument, current_frame_size, is used to force the returned to
frame to zero (see Section 6.5.5, "Bad PFS used by Branch Return" on page
Saves a register or NaT collection to the backing store (store_address =
AR[BSPSTORE]). If store_address{8:3} is equal to 0x3f then the NaT collection
AR[RNAT] is stored. If store_address{8:3} is not equal to 0x3f then the register
RSE.StoreReg is stored and the NaT bit from that register is deposited in
AR[RNAT]{store_address{8:3}}. If the store is successful AR[BSPSTORE] is
incremented by 8. If the store is successful and a register was stored RSE.StoreReg
is incremented by 1 (possibly wrapping in the stacked registers). This store moves a
register from the dirty partition to the clean partition. For mandatory RSE stores, type
is MANDATORY. Mandatory RSE stores may cause interruptions. See
"RSE Interruption Summary" on page
Given a new value for AR[BSPSTORE] (new_store_pointer) this function
computes the new value for AR[BSP]. This value is equal to new_store_pointer
plus the number of dirty registers plus the number of intervening NaT collections. This
means that the size of the dirty partition is the same before and after a write to
AR[BSPSTORE]. All clean registers are moved to the invalid partition.
Returns a 64 bit number with bits pos-1 through 0 taken from value and bit pos-1 of
value replicated in bit positions pos through 63. If pos is greater than or equal to 64,
value is returned.
Operation
6-145.
Table 6-6, "RSE Interruption Summary" on page
6-145.
6-145.
2:143).
Table 6-6,
3:287