Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual page 250

rum — Reset User Mask
( ) rum
Format: qp imm
The complement of the
Description:
result is placed in the user mask. See
on page 2:23.
PSR.up is only cleared if the secure performance monitor bit (PSR.sp) is zero.
Otherwise PSR.up is not modified.
Operation: if (PR[qp]) {
if (is_reserved_field(PSR_TYPE, PSR_UM, imm
reserved_register_field_fault();
if (imm
if (imm
if (imm
if (imm
if (imm
}
Reserved Register/Field fault
Interruptions:
All user mask modifications are observed by the next instruction group.
Serialization:
Volume 3: Instruction Reference
24
operand is ANDed with the user mask (PSR{5:0}) and the
imm
24
{1}) PSR{1} = 0;)
24
{2} && PSR.sp == 0)
24
PSR{2} = 0;)
{3}) PSR{3} = 0;)
24
{4}) PSR{4} = 0;)
24
{5}) PSR{5} = 0;)
24
Section 3.3.2, "Processor Status Register (PSR)"
))
24
// be
//non-secure perf monitor
// up
// ac
// mfl
// mfh
rum
M44
3:241