Format Summary; Template Field Encoding And Instruction Slot Mapping - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual

Table 4-2.
Template
a. The MLX template was formerly called MLI, and for compatibility, the X slot may encode break.i and nop.i in
addition to any X-unit instruction.
4.1

Format Summary

All instructions in the instruction set are 41 bits in length. The leftmost 4 bits (40:37) of
each instruction are the major opcode.
for each of the 5 instruction types — ALU (A), Integer (I), Memory (M), Floating-point
(F), and Branch (B). Bundle template bits are used to distinguish among the 4 columns,
so the same major op values can be reused in each column.
Unused major ops (appearing as blank entries in
• Ignored major ops (white entries in
3:294

Template Field Encoding and Instruction Slot Mapping

Slot 0
00 M-unit
01 M-unit
02 M-unit
03 M-unit
04 M-unit
05 M-unit
06
07
08 M-unit
09 M-unit
0A M-unit
0B M-unit
0C M-unit
0D M-unit
0E M-unit
0F M-unit
10 M-unit
M-unit
11
12 M-unit
13 M-unit
14
15
16 B-unit
17 B-unit
18 M-unit
19 M-unit
1A
1B
1C M-unit
1D M-unit
1E
1F
Slot 1
I-unit
I-unit
I-unit
I-unit
L-unit
L-unit
M-unit
M-unit
M-unit
M-unit
F-unit
F-unit
M-unit
M-unit
I-unit
I-unit
B-unit
B-unit
B-unit
B-unit
M-unit
M-unit
F-unit
F-unit
Table 4-3 shows the major opcode assignments
Table 4-3) behave in one of four ways:
Table 4-3) execute as nop instructions.
Slot 2
I-unit
I-unit
I-unit
I-unit
a
X-unit
a
X-unit
I-unit
I-unit
I-unit
I-unit
I-unit
I-unit
F-unit
F-unit
B-unit
B-unit
B-unit
B-unit
B-unit
B-unit
B-unit
B-unit
B-unit
B-unit
Volume 3: Instruction Formats