Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual page 298

Table 3-1. Pseudo-code Functions (Continued)
Function
tlb_may_purge_itc_entries(rid, vaddr,
size)
tlb_must_purge_dtc_entries(rid, vaddr,
size)
tlb_must_purge_dtr_entries(rid, vaddr,
size)
tlb_must_purge_itc_entries(rid, vaddr,
size)
tlb_must_purge_itr_entries(rid, vaddr,
size)
tlb_purge_translation_cache(loop)
tlb_replacement_algorithm(tlb)
tlb_search_pkr(key)
Volume 3: Pseudo-Code Functions
May locally purge ITC entries that match the specified virtual address (vaddr), region
identifier (rid) and page size (size). May also invalidate entries that partially overlap
the parameters. The extent of purging is implementation dependent. If the purge size
is not supported, an implementation may generate a machine check abort or over
purge the translation cache up to and including removal of all entries from the
translation cache.
Purges all local, possibly overlapping, DTC entries matching the specified region
identifier (rid), virtual address (vaddr) and page size (size). vaddr{63:61}
(VRN) is ignored in the purge, i.e all entries that match vaddr{60:0} must be purged
regardless of the VRN bits. If the purge size is not supported, an implementation may
generate a machine check abort or over purge the translation cache up to and
including removal of all entries from the translation cache. If the specified purge
values overlap with an existing DTR translation, an implementation may generate a
machine check abort.
Purges all local, possibly overlapping, DTR entries matching the specified region
identifier (rid), virtual address (vaddr) and page size (size). vaddr{63:61}
(VRN) is ignored in the purge, i.e all entries that match vaddr{60:0} must be purged
regardless of the VRN bits. If the purge size is not supported, an implementation may
generate a machine check abort or over purge the translation cache up to and
including removal of all entries from the translation cache.
Purges all local, possibly overlapping, ITC entry matching the specified region
identifier (rid), virtual address (vaddr) and page size (size). vaddr{63:61} (VRN) is
ignored in the purge, i.e all entries that match vaddr{60:0} must be purged
regardless of the VRN bits. If the purge size is not supported, an implementation may
generate a machine check abort or over purge the translation cache up to and
including removal of all entries from the translation cache. If the specified purge
values overlap with an existing ITR translation, an implementation may generate a
machine check abort.
Purges all local, possibly overlapping, ITR entry matching the specified region
identifier (rid), virtual address (vaddr) and page size (size). vaddr{63:61} (VRN) is
ignored in the purge, i.e all entries that match vaddr{60:0} must be purged
regardless of the VRN bits. If the purge size is not supported, an implementation may
generate a machine check abort or over purge the translation cache up to and
including removal of all entries from the translation cache.
Removes 1 to N translations from the local processor's ITC and DTC. The number of
entries removed is implementation specific. The parameter loop is used to generate
an implementation-specific purge parameter.
Returns the next ITC or DTC slot number to replace. Replacement algorithms are
implementation specific. tlb specifies to perform the algorithm on the ITC or DTC.
Searches for a valid protection key register with a matching protection key. The
search algorithm is implementation specific. Returns the PKR register slot number if
found, otherwise returns Not Found.
Operation
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