Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual page 338

4.4.1.1 Integer Load
40
M2
Instruction
ld1.ldhint
ld2.ldhint
ld4.ldhint
ld8.ldhint
ld1.s.ldhint
ld2.s.ldhint
ld4.s.ldhint
ld8.s.ldhint
ld1.a.ldhint
ld2.a.ldhint
ld4.a.ldhint
ld8.a.ldhint
ld1.sa.ldhint
ld2.sa.ldhint
ld4.sa.ldhint
ld8.sa.ldhint
ld1.bias.ldhint
ld2.bias.ldhint
ld4.bias.ldhint
ld8.bias.ldhint
ld1.acq.ldhint
ld2.acq.ldhint
ld4.acq.ldhint
ld8.acq.ldhint
ld8.fill.ldhint
ld1.c.clr.ldhint
ld2.c.clr.ldhint
ld4.c.clr.ldhint
ld8.c.clr.ldhint
ld1.c.nc.ldhint
ld2.c.nc.ldhint
ld4.c.nc.ldhint
ld8.c.nc.ldhint
ld1.c.clr.acq.ldhint
ld2.c.clr.acq.ldhint
ld4.c.clr.acq.ldhint
ld8.c.clr.acq.ldhint
ld16.ldhint
ld16.acq.ldhint
Volume 3: Instruction Formats
37 36 35 30 29 28 27 26
4 m x hint x
6
4 1 6 2
Operands
r = [r ]
1 3
r , ar.csd = [r
1
20 19
r
3
1 7 7
Opcode
m
0
4
] 0
3
13 12 6 5
r
1
7
Extension
x x hint
6
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
0 12
See Table 4-39
13
on page 3:328
14
15
16
17
1B
20
21
22
23
24
25
26
27
28
29
2A
2B
28
1
2C
0
qp
6
3:329