Miscellaneous F-Unit Instructions; Miscellaneous X-Unit Instructions; Misc F-Unit 1-Bit Opcode Extensions - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual

4.6.9

Miscellaneous F-Unit Instructions

4.6.9.1 Break (F-Unit)
40
F15
Instruction
break.f
4.6.9.2 Nop/Hint (F-Unit)
F-unit nop and hint instructions are encoded within major opcode 0 using a 3-bit
opcode extension field in bits 35:33 (x
(x ), and a 1-bit opcode extension field in bit 26 (y), as shown in
6
Table 4-68.
Opcode
Bits 40:37
0
40
F16
Instruction
nop.f
hint.f
4.7 X-Unit Instruction Encodings
The X-unit instructions occupy two instruction slots, L+X. The major opcode, opcode
extensions and hints, qp, and small immediate fields occupy the X instruction slot. For
movl, break.x, and nop.x, the imm
imm field and a 2-bit Ignored field occupy the L instruction slot.
39
4.7.1

Miscellaneous X-Unit Instructions

The miscellaneous X-unit instructions are encoded in major opcode 0 using a 3-bit
opcode extension field (x
32:27. Table 4-69
assignments. These instructions are executed by an I-unit.
Volume 3: Instruction Formats
37 36 35 34 33 32 27 26 25
0 i x x
6
4 1 2 1 6
Operands
imm
21

Misc F-Unit 1-bit Opcode Extensions

x
Bit :33 Bits 32:27
0
37 36 35 34 33 32 27 26 25
0 i x x
6
4 1 2 1 6
Operands
imm
21
) in bits 35:33 and a 6-bit opcode extension field (x
3
shows the 3-bit assignments and
imm
1 20
Opcode
0
), a 6-bit opcode extension field in bits 32:27
3
x y
6
Bit 26
0
01
1
y imm
1 20
Opcode
0
field occupies the L instruction slot. For brl, the
41
Table 4-70
6 5
20a
Extension
x x
6
0 00
Table 4-46.
nop.f
hint.f
6 5
20a
Extension
x x y
6
0
0 01
1
summarizes the 6-bit
0
qp
6
0
qp
6
) in bits
6
3:365