Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual page 184

mov — Move Control Register
( ) mov
Format: qp r
( ) mov
qp cr
The source operand is copied to the destination register.
Description:
For the from_form, the control register specified by
GR .
r
1
For the to_form, GR
Control registers can only be accessed at the most privileged level, and when PSR.vm is
0. Reading or writing an interruption control register (CR16-CR27), when the PSR.ic bit
is one, will result in an Illegal Operation fault.
Operation: if (PR[qp]) {
if (is_reserved_reg(CR_TYPE, cr
|| to_form && is_read_only_reg(CR_TYPE, cr
|| PSR.ic && is_interruption_cr(cr
{
illegal_operation_fault();
}
if (from_form)
check_target_register(r
if (PSR.cpl != 0)
privileged_operation_fault(0);
if (from_form) {
if (PSR.vm == 1)
if (cr
if (cr
else
GR[r
} else {
if (GR[r
if (is_reserved_field(CR_TYPE, cr
if ((cr
if (PSR.vm == 1)
if (cr
tmp_val = ignored_field_mask(CR_TYPE, cr
CR[cr
if (cr
Volume 3: Instruction Reference
=
cr
1 3
=
r
3 2
is read and the value copied into CR
r
2
virtualization_fault();
== IVR)
3
check_interrupt_request();
== ITIR)
3
GR[r ] = impl_itir_cwi_mask(CR[ITIR]);
1
GR[r ] = CR[cr ];
1 3
].nat = 0;
1
// to_form
].nat)
2
register_nat_consumption_fault(0);
reserved_register_field_fault();
== IFA) && impl_check_mov_ifa() &&
3
unimplemented_virtual_address(GR[r
unimplemented_data_address_fault(0);
virtualization_fault();
== EOI)
3
end_of_interrupt();
] = tmp_val;
3
== IIPA)
3
is read and the value copied into
cr
3
)
3
)
3
))
3
);
1
, GR[r ]))
3 2
], PSR.vm))
2
, GR[r
3
mov cr
from_form
to_form
.
cr
3
]);
2
3:175
M33
M32