Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual page 36

tmp_taken = (AR[LC] != 0);
if (AR[LC] != 0)
break;
case 'ctop':
case 'cexit':
if (slot != 2)
if (btype == 'ctop') tmp_taken =
if (btype == 'cexit')tmp_taken = !((AR[LC] != 0) || (AR[EC] u> 1));
if (AR[LC] != 0) {
} else if (AR[EC] != 0) {
} else {
}
break;
case 'wtop':
case 'wexit':
if (slot != 2)
if (btype == 'wtop') tmp_taken =
if (btype == 'wexit')tmp_taken = !(PR[qp] || (AR[EC] u> 1));
if (PR[qp]) {
} else if (AR[EC] != 0) {
} else {
}
break;
}
if (tmp_taken) {
Volume 3: Instruction Reference
illegal_operation_fault();
AR[LC]--;
illegal_operation_fault();
AR[LC]--;
AR[EC] = AR[EC];
PR[63] = 1;
rotate_regs();
AR[LC] = AR[LC];
AR[EC]--;
PR[63] = 0;
rotate_regs();
AR[LC] = AR[LC];
AR[EC] = AR[EC];
PR[63] = 0;
CFM.rrb.gr = CFM.rrb.gr;
CFM.rrb.fr = CFM.rrb.fr;
CFM.rrb.pr = CFM.rrb.pr;
illegal_operation_fault();
AR[EC] = AR[EC];
PR[63] = 0;
rotate_regs();
AR[EC]--;
PR[63] = 0;
rotate_regs();
AR[EC] = AR[EC];
PR[63] = 0;
CFM.rrb.gr = CFM.rrb.gr;
CFM.rrb.fr = CFM.rrb.fr;
CFM.rrb.pr = CFM.rrb.pr;
// SW pipelined counted loop
((AR[LC] != 0) || (AR[EC] u> 1));
// SW pipelined while loop
(PR[qp] || (AR[EC] u> 1));
br
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