F-Unit Instruction Encodings; Miscellaneous Floating-Point 1-Bit Opcode Extensions - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual

p
vmsw.0
p
vmsw.1
4.5.3.2 Break/Nop/Hint (B-Unit)
40
B9
Instruction
e
break.b
nop.b
hint.b
4.6

F-Unit Instruction Encodings

The floating-point instructions are encoded in major opcodes 8 – E for floating-point
and fixed-point arithmetic, opcode 4 for floating-point compare, opcode 5 for
floating-point class, and opcodes 0 and 1 for miscellaneous floating-point instructions.
The miscellaneous and reciprocal approximation floating-point instructions are encoded
within major opcodes 0 and 1 using a 1-bit opcode extension field (x) in bit 33 and
either a second 1-bit extension field in bit 36 (q) or a 6-bit opcode extension field (x
in bits 32:27.
additional 1-bit q assignments for the reciprocal approximation instructions;
and Table 4-61
Table 4-59.
Opcode
Bits 40:37
3:356
Instruction
37 36 35 33 32
0/2 i x
6
4 1 3 6
Operands
imm
21
Table 4-59 shows the 1-bit x assignments,
summarize the 6-bit x

Miscellaneous Floating-point 1-bit Opcode Extensions

x
Bit 33
0
0
1
0
1
1
Opcode
0
27 26 25
imm
1 20
Opcode
0
2
assignments.
6
6-bit Ext
Reciprocal Approximation
6-bit Ext
Reciprocal Approximation
Extension
x
6
18
19
6 5
20a
Extension
x
6
00
01
Table 4-62 shows the
Table 4-60
(Table 4-60)
(Table 4-62)
(Table 4-61)
(Table 4-62)
Volume 3: Instruction Formats
0
qp
6
)
6