Gr/Predicate/Ip Moves; Gr/Ar Moves (I-Unit) - Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 3 REV 2.3 Manual

4.3.5.2 Move from BR
40
I22
mov
4.3.6

GR/Predicate/IP Moves

The GR/Predicate/IP move instructions are encoded in major opcode 0. See
"Miscellaneous I-Unit Instructions" on page 3:318
extensions.
4.3.6.1 Move to Predicates – Register
40
I23
mov
4.3.6.2 Move to Predicates – Immediate
40
I24
Instruction
mov
4.3.6.3 Move from Predicates/IP
40
I25
Instruction
mov
4.3.7

GR/AR Moves (I-Unit)

The I-Unit GR/AR move instructions are encoded in major opcode 0. (Some ARs are
accessed using system/memory management instructions on the M-unit. See
Moves (M-Unit)" on page
page 3:318
Volume 3: Instruction Formats
37 36 35 33 32 27 26
0 x x
3 6
4 1 3 6
Instruction
r = b
1
37 36 35 33 32 31
0 s x mask
3
4 1 3 1 8
Instruction
pr = r
37 36 35 33 32
0 s x
3
4 1 3
Operands
pr.rot = imm
44
37 36 35 33 32 27 26
0 x x
3 6
4 1 3 6
Operands
r = ip
1
r = pr
1
3:342.) See
for a summary of the I-Unit GR/AR opcode extensions.
16 15
11
Operands Opcode
0
2
for a summary of the opcode
24 23 20 19
r
8c 2
4 7
Operands Opcode
, mask
2 17
44
imm
27a
27
Opcode
0
14
Opcode
0
"Miscellaneous I-Unit Instructions" on
13 12 6 5
b r
2 1
3 7
Extension
x x
3 6
0 31
13 12 6 5
mask
7a
7
Extension
x
3
0 3
6 5
Extension
x
3
2
13 12 6 5
r
1
7
Extension
x x
3 6
30
0
33
0
qp
6
0
qp
6
0
qp
6
0
qp
6
"GR/AR
3:321