Provider And Consumer Path Port 0 - Infineon EVAL PMG1 S3 DUALDR User Manual

EVAL_PMG1_S3_DUALDRP Evaluation Kit user guide
EVAL_PMG1_S3_DUALDRP kit system design
3.2.1

Provider and consumer path Port 0

EZ-PD™ PMG1-S3 has two integrated NFET gate drivers: VBUS_IN_CTRL _P0 and VBUS_OUT_CTRL _P0 to
control the VBUS provider path connecting the USB Type-C Port 0 VBUS to the power Type-C load on Port 0.
PMG1-S3 uses a GPIO to control the VBUS consumer path connecting the USB Type-C Port 0 VBUS to the Port 0
DC load terminal.
While in Source mode, the power is supplied from the 24 V buck-boost regulator to the Type-C port 0 (J10) using
NFETs, Q10, and Q11. These NFETs are controlled via the VBUS_IN_CTRL _P0 and the VBUS_OUT_CTRL _P0
pins of the EZ-PD™ PMG1-S3 MCU.
In the provider path, a shunt resistance (R33) is connected in series to measure the current flowing to the
Type-C port. The PMG1-S3 MCU uses this current measure to implement OCP/SCP/RCP on Type-C VBUS.
PMG1-S3 also supports VBUS discharge and OVP/UVP features. This is done by monitoring the voltages on the
VBUS_C_P0 pin of the PMG1-S3 MCU and providing a discharge path on it.
While in Sink mode, the power is supplied to the DC load terminal Port 0(J9) from the Type-C Port 0 connector
(J10) using PFETs Q1 and Q2. These PFETs are controlled via a GPIO pin of the EZ-PD™ PMG1-S3 MCU.
Figure 7 VBUS provider and consumer path Port 0
User guide 15 002-38187 Rev. *B
2024-09-23