The Hsma Tab - Intel Cyclone V GT FPGA Development Kit User Manual

6.3.5.4. Error Control
This group displays data errors detected during analysis and allows you to insert
errors:
• Detected Errors—Displays the number of data errors detected in the hardware.
• Inserted Errors—Displays the number of errors inserted into the transaction
stream.
• Insert Error—Inserts a one-word error into the transaction stream each time you
click the button. Insert Error is only enabled during transaction performance
analysis.
• Clear—Resets the Detected errors and Inserted errors counters to zeros.
6.3.5.5. Number of Addresses to Write and Read
This control allows you to determine the number of addresses for each iteration of
reads and writes.

6.3.6. The HSMA Tab

HSMA stands for high-speed mezzanine card for Port A.
The HSMA tab as shown in the following figure allows you to perform loopback tests
on the HSMA transceiver (XCVR), HSMA LVDS, and CMOS ports.
Figure 12. The HSMA Tab
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Cyclone V GT FPGA Development Kit User Guide
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6. Board Test System
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