Intel Cyclone V GT FPGA Development Kit User Manual page 24

6.3.2.1. Power Tree
Figure 7. Power Tree Diagram (DK-DEV-5CGTD9N-B)
6.3.2.2. Power Monitor
Clicking this control starts the Power Monitor application that measures and reports
current power information for the board. As the application communicates over the
JTAG bus to the MAX V device, you can measure the power of any design in the FPGA,
including your own designs. For more information, refer to The Power Monitor section.
Related Information
The Power Monitor
®
Cyclone V GT FPGA Development Kit User Guide
24
19V 6.32A(max)
19V
DC Input (J8)
U9
3.3V_MUX
U17
3.3V_PCIE
U19
12V_MUX
U14
12V_PCIE
U16
LTC3613EWKH
12V
(U24)
LTC3605EUF
(U25)
LTC3608
(U21)
LTC3605EUF
(U1)
LTC3605EUF
(U2)
LDO
(LT3085ED)
(U10)
LTC3009
(U42)
DDR3 VTT
3.3V
(TPS51200)
(U53)
DDR3 VTT
(TPS51200)
(U43)
LDO
2.5V
(LT3022ED)
(U18)
LTC3025
5V
(U39)
LT3022ED
1.5V
(U7)
on page 37
LTC3855EUJ
(U40)
3.3V_OUT
LTC4352
(D31, D33)
12V_OUT
LTC4357
(U44, U45)
Voltage Current
1.1V_REG_VCC
Telemetry
C5_GXB_1.2V
2.5V
1.5V_DDR3
VCCIO_VADJ
5V
5.37V_MONITOR
VTT_DDR3A
VTT_DDR3B
1.8V
C5_VCCIO_1.8V
1.5V
ENET_DVDD
6. Board Test System
792833 | 2024.02.21
3.3V_MUX
12V_MUX
3.3V
12V
C5_VCC
C5_VCCL_GXBL
C5_VCCE_GXBL
C5_2.5V
C5_VCCIO_2.5V
C5_VCCIO_1.5V
C5_VCCIO_VAR
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