Table Of Contents - Intel Cyclone V GT FPGA Development Kit User Manual

Contents
1. Kit Features.................................................................................................................... 4
1.1. Hardware............................................................................................................. 4
1.2. Software.............................................................................................................. 4
1.2.1. Intel
1.2.2. Cyclone V GT FPGA Development Kit Installer................................................ 5
2. Getting Started............................................................................................................... 6
2.1. Before You Begin................................................................................................... 6
2.2. Inspecting the Boards............................................................................................ 6
2.3. References for Getting Started................................................................................ 7
3. Software Installation...................................................................................................... 8
3.1. Installing the Intel Quartus Prime Subscription Edition Software...................................8
3.2. Activating Your License...........................................................................................8
3.3. Installing the Development Kit................................................................................ 9
3.4. Installing the Intel FPGA Download Cable II Driver................................................... 10
4. Development Board Setup.............................................................................................11
4.1. Setting Up the Board............................................................................................11
4.2. Factory Default Switch and Jumper Settings............................................................ 12
4.3. Configuring the MAX V Device to Program EPCQ.......................................................15
4.4. Restoring the MAX V CPLD to the Factory Settings.................................................... 15
4.5. Restoring the Flash Device to the Factory Settings....................................................16
4.6. Configuring the FPGA Using the Intel Quartus Prime Programmer............................... 17
5. Board Update Portal......................................................................................................18
5.1. Connecting to the Board Update Portal Web Page..................................................... 18
5.2. Using the Board Update Portal to Write User Designs................................................ 19
6. Board Test System........................................................................................................ 20
6.1. Preparing to Run the Board Test System................................................................. 21
6.2. Running the Board Test System............................................................................. 21
6.3. Using the Board Test System................................................................................. 21
6.3.1. The Configure Menu................................................................................. 21
6.3.2. The System Info Tab................................................................................ 22
6.3.3. The GPIO Tab.......................................................................................... 26
6.3.4. The Flash Tab.......................................................................................... 28
6.3.5. The DDR3x40 and DDR3x64 Tabs...............................................................29
6.3.6. The HSMA Tab......................................................................................... 32
6.3.7. The HSMB Tab......................................................................................... 34
6.4. The Power Monitor............................................................................................... 37
6.4.1. Power Monitor Features............................................................................ 37
6.4.2. Power Monitor Controls............................................................................. 38
6.5. The Clock Control................................................................................................ 38
6.5.1. Clock Control Features..............................................................................39
6.5.2. Clock Control Controls.............................................................................. 39
7. Document Revision History for Cyclone V GT FPGA Development Kit User Guide...........41
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Cyclone V GT FPGA Development Kit User Guide
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Quartus Prime Software.................................................................. 4
Contents
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