Raytheon DIDS-400 Series Technical Manual page 209

DIDS-402 -2AM13
4 - 31. 1 AND Function
The symbols shown in figure 4-75 repre sent two methods of performing the
logical AND function. Part A of the illustration is used in circuits where the
de sign intent is to produce a high output when two or more inputs are high in
coincidence. Part B is used in circuits where the design intent is to produce a
low output when either of the normally high inputs goes low. Part C is the truth
table for a 2 -input AND-gate.
A
B
C
~
H H
H
~
L
H
L
H
L
L
A.
B.
L
L
L
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C.
Figure 4-75. AND Function Logic Diagram and Truth Table
4-31. 2 NAND Function
The symbols shown in figure 4-76 repre sent two methods of performing the
logical NAND-function. The NAND-function is a variation of the AND-function.
In NAND-gates, however, the output is low if, and only if, all inputs are high.
Part A of the illustration is used in circuits where the design intent is to produce
a low output when all inputs are high in coincidence. Part B is used in circuits
where the de sign intent is to produce a high output when any of the normally high
inputs goes low. Part C illustrates the truth table for a 2-input NAND-gate.
A
B C
~
~
H H
L
L
H H
H L H
A.
B.
L
L H
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C.
Figure 4-76. NAND Function, Logic Diagram and Truth Table
4-31. 3 Inverter/Driver Function
The symbol shown in figure 4-77 repre sents the inverter / driver func'tion.
The purpose of the inverter driver is to invert the logical truth and provide a
rn.ulti-elern.ent drive capability. Depending upon the de sign intent, either a low or
high truth rn.ay be used to drive the connected elements. Parts A, B, and C of
Figure 4-77 illustrate three separate rn.ethods of employing the inverter / driver
function. Part D illustrates the truth table for each function.
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