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DIDS-402 -2AM13
4-23.3. 11 Step-Up Function
The step-up cursor control function moves the cursor froIn any character
position of a line to the same character position of the previous line.
In
memory,
step up causes the cursor to appear in the CE register 14.872 ms later than it
had prior to initiating the step-up function.
This 14.872 ms delay represents
one frame time minus 88 character times (16.016 ms - 1. 144 ms
=
14.872 ms).
After the cursor is delayed by 14.872 ms, it is reinserted into the delay line
to accomplish the step-up function (see figure 4-50).
The step-up function is accomplished by using two auxiliary counters:
12 count and 88 count.
The 12-count output is used to delay the cursor by 12 line
times (13.728 ms).
The 88-count ripple counter (which begins counting at the
cursor position), counts each of the characters separating the cursor from the
sarre character position on the next line.
Each time the 88-count complete pulse
occurs, the cursor is inserted into the CE register and immediately erased when
the next 88 count is enabled.
The counters continue in this manner until 12 count
is complete (13.728 ms) followed by 88-count complete
(1.
44 ms).
These two
outputs combined represent a total delay of 14.872 ms and enable placing the
cursor immediately above the cursor position prior to the function.
In
the step-up circuit quiescent state, A14.5 and A14. 8 are high.
The
STEP UP F/F output from A14. 8 is applied to the 12-count circuit and enables
1i2
pulse s to hold the counter at a constant 0 count status.
When the step up (
t )
key is depressed, or when a DC3 control code is received froIn the CPU without
being preceded by an ESC code, A14.5 changes state from high to low.
The
level at A14. S enables the input to 88-count enable-reset flip-flop A5. 8 (see
figure 4-48).
When the cursor appears in the CE register, three separate actions
occur: (1) NAND-gate A15. 3 is enabled to erase the cursor, (2) A14. 9 goes high
to develop a Step-Up F/F level for starting the 12-count circuit; and (3) the
88-count circuit is enabled to begin counting the first 88 characters.
After 1. 144 InS, 88 CTS pulses have been counted by 88-count.
NAND-gate
AlS.6 is enabled to insert the cursor on the next line, immediately below its
starting position.
Simultaneously, the output of AlS. 6 is used to develop a
function-complete pulse for momentarily resetting A14. 9 through NAND-gate
A 7. 11.
When the cursor appears at the cursor-located flip-flop of the CE regis-
ter 13 fls later, A14.9 once again goes high due to the high input from A14. 6.
Thus, the 12-count circuit is permitted to continue counting.
(Regardless of
where the cursor was located prior to initiating step up, the 12 -count circuit has
by this time counted one line and is progressing in time toward its second line
count. )
Since A14. 5 has remained low during this time, locating the cursor
enabled the 8S-count to begin its second count of 88 characters.
When the
second 88-count complete pulse enables AIS. 6, the cycle is repeated.
To
clarify the sequence of circuit operation, the numerous operations are listed in
order below:
4-129
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