Raytheon DIDS-400 Series Technical Manual page 152

Digital information display system terminal
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DIDS-402 -2AM13
a.
The first frame pulse [F(a)] which occurs after the depression of a
character or function key.
This pulse is developed by the circuit
connected to NAND-gate A80. 6.
b.
A 6-Hz continuous clock.
This output is coupled from NAND-gate
A44. 11 and is present when any function key and the CYCLE key are
depressed simultaneously.
c.
A 12-Hz continuous clock.
This output is coupled from NAND-gate
A44.3 and is present when either the step right (-- ) or step left ( ...
keys are depressed to the second detent position.
Normally, the PB3 clock is developed by enabling NAND-gate A80. 6 during
the first F(a) which occurs after key depression.
In the circuit quiescent state,
A2l. 12 is low and All. 8 is high.
When the operator depresses any key on the
keyboard, the output of A19. 8 is high for as long as the key is held depres sed.
From 0 to 1. 1 ms after key depression, a first word of line (a) pulse clocks
All. 12 high to enable the second input of A80. 6.
On the leading edge of the next F(a) (f:t:om 0 to 16 ms later) A80.6 is
enabled and Fa is gated through as PB3.
The trailing edge of F(a) sets All
~
8
to disable A80. 6.
Thus one, and only one clock pulse is generated in this manner.
This pulse sets the function flip-flop associated with the particular key and
causes the character entry, edit, or cursor control function to be performed.
If the operator holds the key depressed, both A2l.12 and A2l. 8 remain set
and A80. 6 is inhibited.
Thus a second PB3 clock pulse is produced until the
operator releases the key before the character entry, edit, or cursor control
function can be repeated.
To cycle a function, the CYCLE key must be held depressed in conjunction
with a character or function key.
Depressing the CYCLE key enables PB3 clock
pulses at a 6-Hz rate to be gated through NAND-gate A44. 11.
These pulses,
in turn, enable the repetition of the character entry, edit, or cursor control
function without alternately releasing and depressing the applicable key.
The step-right and step-left cycle works in a similar manner.
When
either the step left ( - ) or step right ( - ) key is depressed to its second detent
position, a constant low is applied to the input of A44. 6.
The inverted output
of A44. 6.is combined with l2-Hz clock pulses to develop a 12-Hz PB3 output.
Since the step-left or step-right key must be held depressed to enable A44. 3,
the other keyboard keys are 'locked out' and are therefore not affected by the
12-Hz PB3 pulses.
4-23.3.2 Step-Right Function
The step-right cursor control function moves the cursor one character po-
sition to the right.
The visible effect of step-right is to move the cursor
(
~
or
J )
one character position further from the left side of the CRT screen.
In
memory, step-right causes the cursor to appear in the CE register 13 !Jos later
than it had prior to the step right function (see figure 4-40).
4-108

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