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~
I
00
-J
-
~
I
00
00
LO
=>
ENTER HEADER
·~-----'-])--""X---1X~--Xt-T-i --+~ - -....
X----,b
DATA FROM
BUFFER REGISTER DJ
A44
D S
Q 1----+
DATA TO BUFFER
REGISTER D3
A44
LO
=>
INITIALIZE ....
----+-.......
--+--4_-+-~
......
~--~~I_-
......
- . t _ -...... -+_-...J
TRANSMIT
SG23 ....
--r-
8
SG J 2
...---+-.-r
3(CTS +
J)
DID~,
68->3,
Figure 4-33.
Buffer Register DZ, Logic Diagram
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