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DIDS-402 -2AM13
AND-gate A19. 8 (see paragraph 4-22.4.4).
Since BB3 was cleared as soon as
the control code was decoded. the next character is permitted to enter D3 'on-
top-of' the control code.
As soon as point B goes high (edit or cursor control
function completed), the cursor is located and the character held in D3 is
shifted into the delay line by SDL . ld D3 GATE.
For the majority of control code s, the specific function will be completed
by the time the next character enters D3.
The exceptions are BS, FF, DCI,
DC3, and CAN.
It is a programming requirement that these codes be followed
by one or more NULL characters to give the Display Terminal time to perform
the function.
The operation of SDL when NULL characters are received is
described in paragraph 4-22.4.2.3.4.
The LF code doe s not have to be preceded by ESC in order for the LF code
to be stored.
When LF is decoded, the function is performed without setting the
CCC flip-flop or resetting BB3.
As soon as the cursor is located, the LF code
is permitted to enter memory in the same manner as a standard text character.
4-22.4.2.3.4 Receive Mode - Control Code s BELL, ENQ, and NULL.
When control codes BELL, ENQ, and NULL are received from the CPU,
independent decodes connected to D3 are enabled.
These decoded outputs re suIt
in jamming SDL set and performing the following display terminal functions:
a.
BELL - activates an audible alarm for approximately 160 ms
b.
ENQ - causes the Display Terminal to enter the transmit mode
c.
NULL - used to inhibit delay-line transfers until certain edit or
cursor control functions have been accomplished
When either of these control codes is decoded in D3, the decode output is
applied to the set inputs of A33. Sand A13. 8 through gate AS7. 8.
The re suIt of
this combination is to inhibit D3 GATE and enable clock pulses for shifting the
next character into D3.
Thus, BELL, ENQ, and NULL are never stored in
the delay line even though the preceding character may have been an ESC code.
The low present at AS7. 8 jams A33. S high and Al3. 8 low for one charac-
ter time [4(CTS+l)-. 4(CTS+1)].
During this time, the character shift to
the delay line is inhibited by the low applied to one input of A49.ll.
The D3 clock
is enabled, however, thus permitting the next character to be shifted into D3
from D2.
The ENQ, BELL, or NULL code held in D3 is therefore destroyed
since
it
is essentially shifted into the 'blank wall' formed by inhibited NAND-gate
A49.ll.
As pointed out in paragraph 4-22.4.2.3.3, certain control code s require
successive NULL codes in order to prevent losing data while the function is
being performed.
These requirements are:
a.
BS and
FF -
These codes must be followed by three NULL
characters.
FF and CAN require up to 32 ms to perform
4-77
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