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DIDS-402 -2AM13
4-23.3.8. I 12-Count
When the step-up flip-flop is set, a high is applied to one input of NAND-
gates A80. 11 and A80. 3.
On the rising edge of the next
a
pulse, the counter
begins counting through the states shown in figure 4-47.
During the 12th
a
pulse
counted, 12-count decode AS9.6 produces an output.
This output corresponds
to 12 horizonta1lines on the CRT screen and is used to begin the termination
of the step-up function.
(An additional 88 characters are counted by 88-count
to provide the remainder of the 14. 9-ms delay necessary to move the cursor up
one line.)
LINE:
I
2
3
4
5
6
!' ! 1
JlJLJLJLJLJ
A66. 5
1 . . . . _________
--1
A66. 9
~L__
_ _ _ _ _ _ _ _ _ _ '
A65.5 _ _ _ ---,
A65. 9 _ _ _ _ _ ....,
A7~5
_ _ _ _ _ _ _ _ -,
A74.9----------~
~------------~~
I
,
A73.5 - - - - - - - - - - - - . . . . ,
I
A73.9 - - - - - - - - - - - - - - - - ,
:
'--------~I~I
A59.6
-----------------------.,1 1
(J2-COUNT COMPLETE)
u-
DIDS 68-546
Figure 4-47.
l2-Count Timing Diagram
4-23. 3.8.2 Insert Register
When the insert flip-flop is set, NAND-gate AS!. 3 is enabled and serial
data from the CE register is applied to the input of the insert register.
The f/J2
clock pulse s clock the memory-loop data into the register and, sirn:ultaneously,
the stored IDLE character is coupled through ASO.12.
Since the normal
refresh memory loop is interrupted at this time, all data entering the delay line
does so after passing through this extra register.
The IDLE character enters the delay line in place of the character
associated with the cursor.
Simultaneously, the character associated with the
cursor enters the insert register.
Since each character of the line is delayed
by one character time (because of the extra register), the character previously
displayed as the last character of the line is held in the insert register when
horizontal retrace occurs.
Thus the last character is essentially 'dropped' from
the screen and from memory.
4-123
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