ADLINK Technology SMARC LEC-MTK-I1200 User Manual page 30

LEC-MTK-i1200 User's Guide
4.4.2.2 CSI1 (4 lanes)
Name Pin # Description
CSI1_RX0+ P7 CSI1 differential input
CSI1_RX0- P8
CSI1_RX1+ P10
CSI1_RX1- P11
CSI1_RX2+ P13
CSI1_RX2- P14
CSI1_RX3+ P16
CSI1_RX3- P17
CSI1_CK+ P3 CSI1 differential clock input (point to
CSI1_CK- P4 point)
I2C_CAM1_DAT / S2 I2C data for serial camera data
CSI1_TX- support link or differential data lane
I2C_CAM1_CK / S1 I2C clock for serial camera data
CSI1_TX+ support link or differential data lane
CAM1_PWR# / P109 Camera 1 Power Enable, active low
GPIO1 output.
CAM1_RST# / P111 Camera 1 reset, active low output
GPIO3
CAM_MCK S6 Master clock output
Note: MediaTek has support for up to 3 cameras. The 3
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I/O I/O
Type Level
I LVDS D-PHY
/ I LVDS M-PHY
I LVDS D-PHY
I/O OD CMOS 1.8V
/ O LVDS M-
PHY
O OD CMOS 1.8V
/ O LVDS M-
PHY
O CMOS 1.8V
O CMOS 1.8V
O CMOS 1.8V
rd camera goes to a feature connector on the module as CSI2.
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Power PU / PD Comments
Domain
Runtime
Runtime
Runtime PU 2.2K MIPI-CSI 2.0 uses I2C_CAM0_DAT which requires PU
MIPI-CSI 3.0 uses CSI0_TX-, no PU required
Runtime PU 2.2K MIPI-CSI 2.0 uses I2C_CAM0_CK which requires PU
MIPI-CSI 3.0 uses CSI0_TX+, no PU required
Runtime Shared with GPIO1
Runtime Shared with GPIO 3
Runtime
SGET SMARC Rev 2.1