Amax-5051T Object Dictionary - Advantech AMAX-5000 Series User Manual

Ethercat slice i/o modules
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7.2.5

AMAX-5051T Object Dictionary

7.2.5.1
Time Stamp Input Data
Table 7.4: Input Data (0x1D09)
Index (hex) Name
1D09:10
SysTime
1D09:AE
Status0
1D09:AF
Status1
1D09:B0
LatchPos0
1D09:B8
LatchNeg0
1D09:C0
LatchPos1
1D09:C8
LatchNeg1
[1]: The status0 and status1 are the change record of timestamp DI0 and DI1 within a
cycle, only SingleEventMode will change the status. The statuses are displayed only
in one EtherCAT cycle, the read of LatchPos and LatchNeg resets the status 0/1.
[2]: The LatchPos0/1 is the time of the first/last rising edge, depending on the setting
of SingleEventMode or ContinuousMode.
[3]: The LatchNeg0/1 is the time of the first/last falling edge, depending on the setting
of SingleEventMode or ContinuousMode. The time of LatchPos/LatchNeg is pre-
sented in the form of 64-bit timestamp.
Figure 7.12 Wiring for AMAX-5051T timestamp DI
Meaning
32bit/64bit System Time
Timestamp DI0 latch status
Logic level 0: 0x00
[1]
Logic level 0 to 1: 0x01
Logic level 1: 0x01
Logic level 1 to 0: 0x02
Timestamp DI1 latch status
Logic level 0: 0x00
[1]
Logic level 0 to 1: 0x01
Logic level 1: 0x01
Logic level 1 to 0: 0x02
The time of the first/last rising
[2]
signal edge of DI0
The time of the first/last falling
[3]
signal edge of DI0
The time of the first/last rising
[2]
signal edge of DI1
The time of the first/last falling
[3]
signal edge of DI1
199
Data type Flags Default value
UDINT
RO
0x00
USINT
RO
0x00
USINT
RO
0x00
ULINT
RO
0 Dec
ULINT
RO
0 Dec
ULINT
RO
0 Dec
ULINT
RO
0 Dec
AMAX-5000 Series User Manual

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