Switching Frequency And Phase; Pwm Loop Compensation; Output Voltage Sensing - Analog Devices LTM4683 Manual

LTM4683
OPERATION
In forced continuous mode operation, the inductor current
is allowed to reverse at light loads or under large transient
conditions. The peak inductor current is determined solely
by the voltage on the COMPn pins. In this mode, the effi-
ciency at light loads is lower than in discontinuous mode
operation. However, continuous mode exhibits lower out-
put ripple and less interference with audio circuitry but
may result in reverse inductor current, which can cause
the input supply to boost. The VIN_OV_FAULT_LIMIT can
detect this and turn off the offending channel. However,
this fault is based on an ADC read and can take up to
t to detect. If there is a concern about the input
CONVERT
supply boosting, keep the part in discontinuous conduc-
tion mode.
If the part is set to discontinuous mode operation, as
the inductor average current increases, the controller will
automatically modify the operation from discontinuous
mode to continuous mode.

SWITCHING FREQUENCY AND PHASE

The switching frequency of the PWM can be established
with an internal oscillator or an external time base. The
internal phase-locked loop (PLL) synchronizes the PWM
control to this timing reference with proper phase relation,
whether the clock is provided internally or externally. The
device can also be configured to provide the main clock
to other devices through the PMBus command, NVM
setting, or external configuration resistors, as outlined
in Table 3.
As a main clock, the LTM4683 will drive its open-drain
SYNC_nn pin at the selected rate with a pulse width of
500ns. An external pull-up resistor between SYNC_nn
and V is required in this case. Only one device
DD33_nn
connected to SYNC_nn should be designated to drive the
pin. The LTM4683 will automatically revert to an external
SYNC_nn input, disabling its own SYNC_nn, as long as
the external SYNC_nn frequency is greater than 80% of
the programmed SYNC_nn frequency. The external SYNC
input shall have a duty cycle between 20% and 80%.
Whether configured to drive SYNC_nn or not, the LTM4683
can continue PWM operation using its own internal oscil-
lator if an external clock signal is subsequently lost.
32
The device can also be programmed to always require an
external oscillator for PWM operation by setting bit 4 of
MFR_CONFIG_ALL. The status of the SYNC driver circuit
is indicated by bit 10 of MFR_PADS.
The MFR_PWM_CONFIG command can be used to con-
figure the phase of each channel. The desired phase can
also be set from EEPROM or external configuration resis-
tors, as outlined in Table 3. The designated phase is the
relationship between the falling edge of SYNC and the
internal clock edge that sets the PWM latch to turn on the
top power switch. Additional small propagation delays to
the PWM control pins will also apply. Both channels must
be off before the FREQUENCY_SWITCH and MFR_PWM_
CONFIG commands can be written to the LTM4683.
The phase relationships and frequency options provide for
numerous application options. Multiple LTM4683 mod-
ules can be synchronized to realize a PolyPhase array.
In this case, the phases should be separated by 360/n
degrees, where n is the number of phases driving the
output voltage rail.

PWM LOOP COMPENSATION

The internal PWM loop compensation resistors R
of the LTM4683 can be adjusted using bit[4:0] of the
MFR_PWM_COMP command for each controller.
The transconductance (g
amplifier can be adjusted using bit[7:5] of the MFR_
PWM_COMP command. These two loop compensation
parameters can be programmed when the device is in
operation. See the Programmable Loop Compensation
subsection in the Applications Information section for
further details.

OUTPUT VOLTAGE SENSING

All four channels in LTM4683 have differential amplifi-
ers, which allow the remote sensing of the load voltage
between V
differential and makes measurements between V
and V
OSNSn
pins, respectively. The maximum allowed is 1V, but the
LTM4683 design is limited to 0.7V.
For more information www.analog.com
) of the LTM4683 PWM error
m
+ –
and V pins. The telemetry ADC is also fully
–
voltages for both channels at the V
COMP
+
OSNSn
+ –
and V
Rev. 0