Soft-Start; Time-Based Sequencing - Analog Devices LTM4683 Manual

LTM4683
OPERATION
Configuration) Pins section for more details. The resistor
configuration pins only control some of the preset values
of the controller. The remaining values are programmed in
NVM either at the factory or by the user.
If the configuration resistors are not inserted or if the
ignore R bit is asserted (bit 6 of the MFR_CONFIG_
CONFIG
ALL configuration command), the LTM4683 will use only
the contents of NVM to determine the DC/DC character-
istics. The ASEL_nn value read at power-up or reset is
always respected unless the pin is open. The ASEL_nn
will set the bottom 4LSBs, and the MSBs are set by NVM.
See the Applications Information section for more details.
After the part has initialized, an additional comparator
monitors V through the SV
IN
threshold must be exceeded before the output power
sequencing can begin. After V
part will typically require 30ms to initialize and begin the
TON_DELAY timer. The readback of voltages and currents
may require an additional 0ms to 90ms.

SOFT-START

The method of start-up sequencing described below is
time-based. The part must enter the run state before soft-
start. The run pins are released by the LTM4683 after the
part is initialized, and SV
IN_nn
threshold. If multiple LTM4683s are used in an application,
they all hold their respective run pins low until all devices
are initialized, and SV
IN_nn
for every device. The SHARE_CLK_nn pin assures all the
devices connected to the signal use the same time base.
The SHARE_CLK_nn pin is held low until the part has
been initialized after V is applied. The LTM4683 can be
IN
set to turn-off (or remain off) if SHARE_CLK_nn is low
(set bit 2 of MFR_CHAN_CONFIG to 1). This allows the
user to ensure synchronization across numerous Analog
Devices ICs, even if the RUNn pins cannot be connected
together due to board constraints. In general, if the user
cares about synchronization between chips, it is best not
only to connect all the respective RUNn pins together but
also to connect all the respective SHARE_CLK_nn pins
together and pulled up to V
This assures that all chips begin sequencing simultane-
ously and use the same time base.
30
pins. The VIN_ON
IN_nn
is initially applied, the
IN
is greater than the VIN_ON
exceeds the VIN_ON threshold
with a 10k resistor.
DD33_nn
For more information
After the RUNn pins release and before entering a constant
output voltage regulation state, the LTM4683 performs a
monotonic initial ramp or "soft-start". Soft-start is per-
formed by actively regulating the load voltage while digi-
tally ramping the target voltage from 0V to the commanded
voltage set-point. Once the LTM4683 is commanded to turn
on (after power up and initialization), the controller waits for
the user-specified turn-on delay (TON_DELAY) before initi-
ating this output voltage ramp. The rise time of the voltage
ramp can be programmed using the TON_RISE command
to minimize inrush currents associated with the start-up
voltage ramp. The soft-start feature is disabled by setting
the value of TON_RISE to any value less than 0.25ms. The
LTM4683 PWM always uses discontinuous mode during
the TON_RISE operation. In discontinuous mode, the bot-
tom MOSFET is turned off as soon as reverse current is
detected in the inductor. This will allow the regulator to start
up into a pre-biased load. When the TON_MAX_FAULT_
LIMIT is reached, the part transitions to continuous mode, if
so programmed. If TON_MAX_FAULT_LIMIT is set to zero,
there is no time limit, and the part transitions to the desired
conduction mode after TON_RISE completes and V
has exceeded the VOUT_UV_FAULT_LIMIT and IOUT_OC
is not present. However, setting TON_MAX_FAULT_LIMIT
to a value of 0 is not recommended.

TIME-BASED SEQUENCING

The default mode for sequencing the outputs on and off is
time-based. Each output is enabled after waiting a TON_
DELAY amount of time following either a RUN pin going
high, a PMBus command to turn on or the V
a preprogrammed voltage. Off-sequencing is handled sim-
ilarly. To ensure proper sequencing, ensure all ICs connect
the SHARE_CLK_nn pin together and RUNn pins together.
If the RUNn pins cannot be connected together for some
reasons, set bit 2 of MFR_CHAN_CONFIG to 1. This bit
requires the SHARE_CLK_nn pin to be clocking before
the power supply output can start. When the RUNn pin is
pulled low, the LTM4683 will hold the pin low for the MFR_
RESTART_DELAY. The minimum MFR_RESTART_DELAY
is TOFF_DELAY + TOFF_FALL + 136ms. This delay assures
proper sequencing of all rails. The LTM4683 calculates
this delay internally and will not process a shorter delay.
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OUTn
rising above
IN
Rev. 0