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ACU3EG
User manual
Alinx ACU3EG User Manual page 21
Zynq ultrascale + fpga board
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Clock pin assignment:
21 / 33
ZYNQ Ultrascale + FPGA Board ACU3EG User Manual
Figure 6-4: PL system clock source
Signal Name
PL_CLK0_P
PL_CLK0_N
Amazon Store: https://www.amazon.com/alinx
Pin
AE5
AF5
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