P3 Port Group - Epson S1C17W18 Technical Manual

6 I/O PORTS (PPORT)

6.7.4 P3 Port Group

The P3 port group supports the GPIO and interrupt functions.
Notes: • The P3 port group does not exist in the 64-pin package.
• The P33, P34, and P36 ports do not exist in the 80-pin package. The control bits corre-
sponding to these ports are ineffective.
Register name Bit
P3DAT 15–8 P3OUT[7:0]
(P3 Port Data
7–0 P3IN[7:0]
Register)
P3IOEN 15–8 P3IEN[7:0]
(P3 Port Enable
7–0 P3OEN[7:0]
Register)
P3RCTL 15–8 P3PDPU[7:0]
(P3 Port Pull-up/down
7–0 P3REN[7:0]
Control Register)
P3INTF 15–8 –
(P3 Port Interrupt
7–0 P3IF[7:0]
Flag Register)
P3INTCTL 15–8 P3EDGE[7:0]
(P3 Port Interrupt
7–0 P3IE[7:0]
Control Register)
P3CHATEN 15–8 –
(P3 Port Chattering
Filter Enable
7–0 P3CHATEN[7:0]
Register)
P3MODSEL 15–8 –
(P3 Port Mode Select
7–0 P3SEL[7:0]
Register)
P3FNCSEL 15–14 P37MUX[1:0]
(P3 Port Function
13–12 P36MUX[1:0]
Select Register)
11–10 P35MUX[1:0]
9–8 P34MUX[1:0]
7–6 P33MUX[1:0]
5–4 P32MUX[1:0]
3–2 P31MUX[1:0]
1–0 P30MUX[1:0]
P3SELy = 0
Port
name GPIO
Peripheral
P30 P30
P31 P31
P32 P32
P33 P33
P34 P34
P35 P35
P36 P36
P37 P37
*1: Refer to the "Universal Port Multiplexer" chapter.
6-14
Table 6.7.4.1 Control Registers for P3 Port Group
Bit name Initial
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Table 6.7.4.2 P3 Port Group Function Assignment
P3yMUX = 0x0 P3yMUX = 0x1
(Function 0) (Function 1)
Pin Peripheral
– – UPMUX
– – UPMUX
– – UPMUX
– – UPMUX
– – UPMUX
– – UPMUX
– – UPMUX
– – UPMUX
Seiko Epson Corporation
Reset R/W
H0 R/W –
H0 R
H0 R/W –
H0 R/W
H0 R/W –
H0 R/W
– R –
H0 R/W Cleared by writing 1.
H0 R/W –
H0 R/W
– R –
H0 R/W
– R –
H0 R/W
H0 R/W –
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
P3SELy = 1
P3yMUX = 0x2
(Function 2)
Pin Peripheral Pin
– –
*1
– –
*1
– –
*1
– –
*1
– –
*1
– –
*1
– –
*1
– –
*1
S1C17W18 TECHNICAL MANUAL
Remarks
P3yMUX = 0x3
(Function 3)
Peripheral Pin
– –
– –
– –
– –
– –
– –
– –
– –
(Rev. 1.2)