Epson S1C17W18 Technical Manual page 316

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Address Register name
0x4042 CLGOSC
(CLG Oscillation
Control Register)
0x4044 CLGIOSC
(CLG IOSC Control
Register)
0x4046 CLGOSC1
(CLG OSC1 Control
Register)
0x4048 CLGOSC3
(CLG OSC3 Control
Register)
0x404c CLGINTF
(CLG Interrupt Flag
Register)
0x404e CLGINTE
(CLG Interrupt Enable
Register)
0x4050 CLGFOUT
(CLG FOUT Control
Register)
AP-A-2
Bit Bit name
15–12 –
11 EXOSCSLPC
10 OSC3SLPC
9 OSC1SLPC
8 IOSCSLPC
7–4 –
3 EXOSCEN
2 OSC3EN
1 OSC1EN
0 IOSCEN
15–8 –
7–5 –
4 IOSCSTM
3–0 –
15 –
14 OSDRB
13 OSDEN
12 OSC1BUP
11 –
10–8 CGI1[2:0]
7–6 INV1B[1:0]
5–4 INV1N[1:0]
3–2 –
1–0 OSC1WT[1:0]
15–13 –
12–10 OSC3FQ[2:0]
9–8 OSC3MD[1:0]
7–6 –
5–4 OSC3INV[1:0]
3 –
2–0 OSC3WT[2:0]
15–8 –
7 –
6 (reserved)
5 OSC1STPIF
4 IOSCTEDIF
3 –
2 OSC3STAIF
1 OSC1STAIF
0 IOSCSTAIF
15–8 –
7 –
6 (reserved)
5 OSC1STPIE
4 IOSCTEDIE
3 –
2 OSC3STAIE
1 OSC1STAIE
0 IOSCSTAIE
15–8 –
7 –
6–4 FOUTDIV[2:0]
3–2 FOUTSRC[1:0]
1 –
0 FOUTEN
Seiko Epson Corporation
Initial Reset R/W
0x0 – R
1 H0 R/W
1 H0 R/W
1 H0 R/W
1 H0 R/W
0x0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
1 H0 R/W
0x00 – R
0x0 – R
0 H0 R/WP
0x0 – R
0 – R
1 H0 R/WP
0 H0 R/WP
1 H0 R/WP
0 – R
0x0 H0 R/WP
0x2 H0 R/WP
0x1 H0 R/WP
0x0 – R
0x2 H0 R/WP
0x0 – R
0x3 H0 R/WP
0x0 H0 R/WP
0x0 – R
0x1 H0 R/WP
0 – R
0x6 H0 R/WP
0x00 – R
0x0 – R
0 H0 R
0 H0 R/W
0 H0 R/W
0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 – R
0 – R
0 H0 R
0 H0 R/W
0 H0 R/W
0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 – R
0 – R
0x0 H0 R/W
0x0 H0 R/W
0 – R
0 H0 R/W
S1C17W18 TECHNICAL MANUAL
Remarks
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Cleared by writing 1.
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Cleared by writing 1.
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(Rev. 1.2)