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The NODE # line lists the (hexadecimal) node numbers on the TLSB
1
and I/O buses. Node numbers and slot numbers are identical. For the PCI
I/O subsystem nodes 0 - B are counted from right to left.
The TYP line indicates the type of module at each TLSB node:
2
•
1 2
An adapter: the I/O port module (A) is a KFTIA or a KFTHA
2
•
A memory module (M)
•
A processor (P)
A period (.) indicates the slot is empty or the module is not reporting.
The ST1–ST3 lines show the results of the testing. The self-test bit
3
in the TLCNR register of each module contains this information. For the
KN7CC dual processor one CPU may pass, another fail. Entries are:
•
+ (pass) A .+ indicates a uniprocessor passed.
•
− (fail)
A -+ indicates one CPU failed and one CPU passed on a dual-
processor module.
•
o (does not apply). In this example, the I/O port module has "o" be-
cause there is no module-resident self-test.
The BPD line indicates boot processor designation. The results on
4
this line indicate:
•
The boot processor (B)
•
Processors eligible to become the boot processor (E)
•
Processors ineligible to become the boot processor (D)
The BPD line is printed three times. After the first determination of the
boot processor, the processors go through two more rounds of testing.
Since it is possible for a processor to pass self-test at line ST1 and fail ST2
or ST3 testing, the processors again determine the boot processor following
each round of tests.
The I/O channel line C0 indicates the state of the internal PCI I/O
5
channel on the KFTIA and shows that devices at nodes 0, 1, 2, 4, 5, and 6
all passed self-test. Line C1 indicates the self-test results for the DWLPA
4
and all PCI adapters connected through the KFTIA's hose. In this exam-
ple, self-test passed on PCI nodes 0, 1, 2, 3. Had a KFTHA been present,
channel lines for each of the four I/O connections would have been shown.
For more information:
Operations Manual
3
System Self-Test 6-5
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