System Architecture - Analog Devices ADSP-BF707 EZ-KIT Lite Manual

System Architecture

System Architecture
2-2
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This section describes the processor's configuration on the EZ-KIT Lite
board (Figure 2-1).
USB
FTDI
FT232RQ
UART0
25 MHz
Oscillator
JTAG/SWD/SWO
10 pin 0.05"
TRACE
38 pin mictor
RTC
32.768 kHz
Oscillator
16mm
battery
holder
1.8V
ADP5024
5V
1.1V
3.3V
Figure 2-1. EZ-KIT Lite Block Diagram
This EZ-KIT Lite is designed to demonstrate the ADSP-BF707 proces-
sor's capabilities. The ADSP-BF707 EZ-KIT Lite has a 25 MHz input
clock and runs at 400 MHz internally.
USB circuitry and a micro USB AB connector are provided for connecting
to the EZ-KIT Lite as a host or a device. The frequency for the USB cir-
cuit is generated by an external 24 MHz oscillator.
ADSP-BF707 EZ-KIT Lite Evaluation System Manual
CAN CAN
RJ11 RJ11
USB otg
NXP NXP
TJA1041 TJA1041
24 MHz
Oscillator
USB0 CAN0 CAN1
ADSP-BF707
BGA 400MHz
DMC0
EI3 (1A , 1B, 1C)
2GB
DDR2
32 Mbit Quad
SPI Flash
SPI2
PBs (2)
LEDs (3)
SPI2 RF Wireless
MSI0
SD/MMC
Conn