Part 3.2: 125Mhz Differential Clock - Alinx AC7200 Manual

Figure 3-2: 200Mhz Active Differential Crystal on the Core Board
200Mhz Differential Clock Pin Assignment
Signal Name
SYS_CLK_P
SYS_CLK_N

Part 3.2: 125Mhz differential clock

G2 in Figure 3.3 is the 125M active differential crystal oscillator circuit. This
clock is the reference input clock provided to the GTP module inside the FPGA.
The crystal oscillator output is connected to the BANK216 clock pins
MGTREFCLK0P (F6) and MGTREFCLK0N (E6) of the FPGA GTP.
Figure 3-3: 125Mhz Active Differential Crystal Schematic
9 / 30
ARTIX-7 SoM FPGA Core Board AC7200 User Manual
Amazon Store:
Sales Email:
FPGA PIN
R4
T4
https://www.amazon.com/alinx
rachel.zhou@aithtech.com