Part 7: Reset Key - Alinx AC7200 Manual

Part 7: Reset Key

There is a reset key on the AC7200 FPGA core board. The reset key is
connected to the normal IO of the BANK34 of the FPGA chip. The user can use
this reset key to initialize the FPGA program. When the key is pressed in the
design, the signal voltage input to IO is low, and the reset signal is valid; when
the key is not pressed, the signal input to IO is high. The schematic diagram of
the reset key connection is shown in Figure 7-1:
Reset key pin assignment
Signal Name
RESET_N
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ARTIX-7 SoM FPGA Core Board AC7200 User Manual
Figure 7-1: Reset key Schematic
Figure 7-2: Reset key on the Core Board
ZYNQ Pin Name
IO_L17N_T2_34
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Sales Email:
ZYNQ Pin Number
T6
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rachel.zhou@aithtech.com
Description
FPGA system reset