Alinx AC7200 Manual page 29

generated by one LDOSPX3819M5-3-3. VCCIO mainly supplies power to
BANK15 and BANK16 of FPGA. Users can change the IO of BANK15,16 to
different voltage standards by replacing their LDO chip. 1.5V Generates the
VTT and VREF voltages required by DDR3 via TI's TPS51200. The 1.8V power
supply MGTAVTT MGTAVCC for the GTP transceiver is generated by TI's
TPS74801 chip. The functions of each power distribution are shown in the
following table:
Power Supply
+1.0V
+1.8V
+3.3V
+1.5V
VREF,VTT(+0.75V)
MVCCIP(+3.3V)
MGTAVTT(+1.2V)
MGTVCCAUX(+1.8V)
Because the power supply of Artix-7 FPGA has the power-on sequence
requirement, in the circuit design, we have designed according to the power
requirements of the chip, and the power-on is 1.0V->1.8V->(1.5 V, 3.3V, VCCIO)
and 1.0V-> MGTAVCC -> MGTAVTT, the circuit design to ensure the normal
operation of the chip.
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ARTIX-7 SoM FPGA Core Board AC7200 User Manual
FPGA auxiliary voltage, TPS74801 power supply
VCCIO of Bank0,Bank13 and Bank14 of FPGA,QSIP FLASH, Clock Crystal
DDR3, Bank34 and Bank35 of FPGA
GTP Transceiver Bank216 of FPGA
GTP Transceiver Bank216 of FPGA
Amazon Store:
Sales Email:
Function
FPGA Core Voltage
DDR3
FPGA Bank15, Bank16
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