Part 9: Power Interface on the Core Board
In order to make the AC7200 FPGA core board work alone, the core board
is reserved with the 2PIN power interface (J3). When the user supplies power
to the core board through 2PIN power interface (J3), it cannot be powered
through the carrier board. Otherwise, current conflict may occur.
Figure 9-1: Power Interface on the Core Board
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ARTIX-7 SoM FPGA Core Board AC7200 User Manual
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