Watchdog Timer Operations; Watchdog Timer Operation - NEC mPD780973 Series Preliminary User's Manual

8-bit single-chip microcontrollers
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11.4 Watchdog Timer Operations

11.4.1 Watchdog timer operation

When bit 4 (WDTM4) of the watchdog timer mode register (WDTM) is set to 1, the watchdog timer is operated to
detect any runaways.
Watchdog timer starts by setting bit 7 (RUN) of WDTM to 1. After the watchdog timer is started, set RUN to 1 within
the set runaway time interval. The watchdog timer can be cleared and counting is started.
If RUN is not set to 1 and the runaway detection time is past, system reset or a non-maskable interrupt request
is generated according to the WDTM bit 3 (WDTM3) value.
The watchdog timer continues operating in the HALT mode but it stops in the STOP mode. Thus, set RUN to 1
before the STOP mode is set, clear the watchdog timer and then execute the STOP instruction.
Caution
The actual runaway detection time may be shorter than the set time by a maximum of 0.5%.
Remarks 1. f
: Main system clock oscillation frequency
X
2. Figures in parentheses apply to operation with f
CHAPTER 11 WATCHDOG TIMER
Table 11-4. Watchdog Timer Runaway Detection Time
Runaway Detection Time
× 1/f
(489 µ s)
12
2
X
× 1/f
(978 µ s)
13
2
X
× 1/f
14
2
(1.96 ms)
X
× 1/f
15
2
(3.91 ms)
X
× 1/f
16
2
(7.82 ms)
X
× 1/f
17
2
(15.6 ms)
X
× 1/f
18
2
(31.3 ms)
X
× 1/f
20
2
(125 ms)
X
= 8.38 MHz.
X
143

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