NEC mPD780973 Series Preliminary User's Manual page 294

APPENDIX C REGISTER INDEX
External interrupt falling edge enable register (EGN) ... 231
External interrupt rising edge enable register (EGP) ... 231
[I]
Interrupt mask flag register 0H (MK0H) ... 229
Interrupt mask flag register 0L (MK0L) ... 229
Interrupt mask flag register 1L (MK1L) ... 229
Interrupt request flag register 0H (IF0H) ... 228
Interrupt request flag register 0L (IF0L) ... 228
Interrupt request flag register 1L (IF1L) ... 228
[L]
LCD display control register (LCDC) ... 193
LCD display mode register (LCDM) ... 192
LCD timer control register (LCDTM) ... 203
[M]
Memory size switching register (IMS) ... 258
[O]
Oscillation stabilization time select register (OSTS) ... 246
Oscillator mode register (OSCM) ... 91
[P]
Port 0 (P0) ... 75
Port 1 (P1) ... 76
Port 2 (P2) ... 77
Port 3 (P3) ... 78
Port 4 (P4) ... 79
Port 5 (P5) ... 80
Port 6 (P6) ... 81
Port 8 (P8) ... 82
Port 9 (P9) ... 83
Port mode control register (PMC) ... 217
Port mode register 0 (PM0) ... 84
Port mode register 2 (PM2) ... 84
Port mode register 3 (PM3) ... 84
Port mode register 4 (PM4) ... 84
Port mode register 5 (PM5) ... 84
Port mode register 6 (PM6) ... 84, 147
Port mode register 8 (PM8) ... 84
Port mode register 9 (PM9) ... 84
Power-fail compare mode register (PFM) ... 154
Power-fail compare threshold value register (PFT) ... 154
Prescaler mode register (PRM0) ... 105, 232
Priority specify flag register 0H (PR0H) ... 230
Priority specify flag register 0L (PR0L) ... 230
Priority specify flag register 1L (PR1L) ... 230
Processor clock control register (PCC) ... 90
Pull-up resistor option register (PU0) ... 87
294