Reference Circuit Design For Earpiece Interface; Reference Circuit Design For Headphone Interface - Quectel SC600Y-EM Series Hardware Design

Smart lte module
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3.23.2. Reference Circuit Design for Earpiece Interface

EAR_P
EAR_N
Module
Figure 29: Reference Circuit Design for Earpiece Interface

3.23.3. Reference Circuit Design for Headphone Interface

MIC_GND
MIC2_P
HPH_L
HS_DET
HPH_R
HPH_REF
Module
Figure 30: Reference Circuit Design for Headphone Interface
SC600Y&SC600T_Hardware_Design
C2
33pF
C1
33pF
C3
33pF
R1
0R
F1
R2
20K
C3
C4
C5
33pF
33pF 33pF
Smart LTE Module Series
SC600Y&SC600T Hardware Design
R1
0R
R2
0R
D1
F2
F3
F4
D1 D2 D3 D4
ESD
D2
1
5
4
6
3
2
R3
0R
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