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Housekeeping ADC
Housekeeping ADC
UART0 Interface
CAN0 Interface
1-10
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The ADSP-BF707 processor provides four housekeeping ADC inputs:
through
HADC0_VIN0
HADC_VIN3
pin 2 of a four position 0.1" header (
on pin 1, allowing a jumper to connect the voltage back to the processor.
Pin 4 of
connects through an RC timer to
JP1
and
HADC_VIN2
HADC_VIN3
Refer to
ADSP-BF707 EZ-KIT Lite Schematic
The ADSP-BF707 processor has two built-in universal asynchronous
transmitters (UARTs).
UART0
to UART converter IC (
The UART functionality is connected by default through SoftConfig.
Refer to
Software-Controlled Switches (SoftConfig)
information.
For more information, refer to the UART0 example in the POST, which
is included in the ADSP-BF707 Board Support Package.
The Controller Area Network 0 (
connected to the NXP TJA1041 CAN transceiver (
attached to the
port of the ADSP-BF707processor via an RJ-11 con-
CAN0
nector (
). See
CAN0 Connector
J4
The
transmit, receive, and error signals are connected through the
CAN0
SoftConfig switches and disabled by default.
and
is disabled. See
CAN0_STB
ADSP-BF707 EZ-KIT Lite Evaluation System Manual
. The EZ-KIT Lite connects
).
has
JP1
JP1
HADC0_VIN1
are connected to SMC connectors (
for more information.
is connected to an FTDI, FT232RQ, USB
).
U45
) interface of the EZ-KIT Lite is
CAN0
(J4).
CAN0_EN
Software-Controlled Switches
to
HADC0_VIN0
voltage domain
VDD_RTC
.
and
).
J7
J8
for more
). The transceiver is
U46
is enabled by default
(SoftConfig).
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