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A variable refresh is possible as shown below:
Write to Register n96h with WDS[2,0] having the value below
001
000
16ms
8.6ms
The programmable watchdog can be viewed as a decrementing counter that is initialized by
a write to register n92h. The processor must initialize the counter to prevent it from
reaching count 0 (timeout).
The following C language procedure can be used to trigger the programmable watchdog.
#define TekReg 0x190
void TrigWatchdog(timeout)
{
outp(TekReg+6,(inp(TekReg+6) & 0x0F) | (timeout & 0xF0));
}
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000
000
WatchD og internal counter value
// define base address (0x190, 0x290 or 0x390)
// select timeout at runtime: 0x80 = 0.016s,
// 0x90 = 0.065s, 0xA0 = 0.261s, ...
3-21
Installing the Board
NMI
8.6 ms
RESET
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