Alinx ZYNQ 7000 User Manual page 11

VREF, VTT
VCCIO
Because the power supply of the ZYNQ FPGA has the power-on
sequence requirements, in the circuit design, we have designed according to
the power requirements
+1.0V->+1.8V->+1.5 V->+3.3V->VCCIO, circuit design to ensure the normal
operation of the chip. Figure 3-2 shows the circuit design of the power supply:
In the PCB design, an 8-layer PCB is used, and a separate power supply
layer and GND layer are reserved, so that the power supply of the entire
development board has very good stability. Test points for each power supply
are reserved on the PCB so that the user can confirm the voltage on the board.
Figure 3-3: Test Points for Power supply on the Board
11 / 47
ZYNQ FPGA Development Board AX7020 User Manual
of the
Figure 3-2: Power Supply Circuit
DDR3
ZYNQ Bank35
chip. The power-on sequence is