Table 8-190 Serdes Receiver Status Register - Emerson ATCA-8310 Manual

CPLD and FPGA
8.4.2.5.2 Serdes Receiver Status Register
Address: 0x81, SerDesRcvStatReg
Width: 8 bit
The Serdes receiver status is shown

Table 8-190 Serdes Receiver Status Register

Bit Acronym
7 SerdesRcvPllLolFlag
6 SerdesRcvLosFlag
5 SerdesRcvHasFoundCommaFlag
4 -
3 SerdesRcvPllLol
2 SerdesRcvLos
1 SerdesRcvHasFoundComma
0 -
8.4.2.5.3 Supplemental Test Pattern Receive Data Register
Address: 0x82, SupplTstPatDataRcvDatReg
398
Type Description
R 0b1: SerdesRcvPllLolFlag,
Set when the Serdes
receiver PLL has lost lock.
Reset by respective bit in
SerDesTrmCtrlReg
R 0b1: SerdesRcvLosFlag,
set when the loss of signal
R 0b1:
SerdesRcvHasFoundCom
maFlag, set when first
comma found, after
period with no commas.
- reserved
R 0b1: SerdesRcvPllLol,
Shows actual status of
Serdes receiver PLL lock.
R 0b1: SerdesRcvLos,
current the loss of signal
status
R 0b1:
SerdesRcvHasFoundCom
ma, current status of
comma detection
- reserved
ATCA-8310 Installation and Use (6806800M72D)
Default Pwr Soft
0b0 F F
0b0 F F
0b0 F F
undef - -
0b0 F F
0b0 F F
0b0 F F
undef - -