Emerson ATCA-8310 Manual page 371

CPLD and FPGA
Unit Description
The main task of the DSP FPGA is to connect the speech payload of one DSP-Pool on a DSP-
submodule or on the baseboard to the RTM-FPGA via one 2.5 Gbit/s SERDES link.
Besides this the DSP FPGA supplies all DSP devices on the module with clocks and supports the
host controller on the base board related to power control and monitoring, reset control,
interrupt control and boot monitoring. The DSP FPGA has a SPI control and status interface to
the host controller.
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ATCA-8310 Installation and Use (6806800M72D)